8085 Microprocessor

5 Pin Diagram contd…

3) Power supply: 

VCC : +5 V

VSS : Ground

4) Clock Frequency:

X1, X2: A crystal (RC,LC N/W) is connected at these two pins. this frequency is internally divided by 2.

CLK OUT: clock output this signal can be used as the system clock for the other devices.

5) Externally initiated signals: In this

Five interrupt signals: TRAP, RST 7.5, RST 6.5, RST 5.5 ,INTR.

INTA: interrupt acknowledge

RESET IN: It is a active low signal. When active program counter is set to zero.

RESET OUT: This signal indicates that the MPU is being reset, the signal can be used to reset other devices.

READY: If ready is high during a read or write cycle, it indicates that the memory or peripheral is ready to send or receive data. If ready is low, the CPU will wait for ready to go high before completing the read or write cycle.

HOLD: this signal indicate that another master is requesting the use of the address and data buses.

HLDA: HOLD Acknowledge indicates that the CPU has received the Hold request and that it will relinquish the buses I the next clock cycle. HLDA goes low after the HOLD request is removed. The CPU   takes the buses one half clock cycle HLDA goes low.  

6) Serial I/O ports:

 SOD: serial output data line. The output SOD is set or reset as specified by the SIM instruction.

 SID: Serial input data line, the data on this line is loaded into accumulator whenever a RIM instruction is executed.

In this data bits are sent over a single line one bit at a time.

For ex: Transmission over phone lines.



25in;8� ls���v�l1 lfo1'>2)      Control and status signals: these signals are used to identify the nature of operation.


Three control signals that are-

RD – it is a active low signal. Which indicate that the selected IO or Memory device is to be read and data is available on the data bus.

WR-it is a active low signal which indicate that the data on the data bus are to be written into a selected memory or IO location.

ALE- it is a +ve going pulse generated everytime the 8085 begins an operation (machine cycle): which indicate that the bits on AD7-AD0 are address bits.

Three status signals that are

IO/M- this is a status signal used to differentiate between IO and Memory operations.when it is hign then IO operation and When it is low then Memory operation.

S1 and S0- status signals,similar to IO/M,can identify various operations.that are rarely used in the systems.