3 Architecture of 8085
Fig : block diagram of 8085
8085 architecture consists of five functional units:
1. arithmatic and logic unit :
The ALU performs the actual numerical and logic operation such as add’, ‘subtract’, ‘AND’, ‘OR’, etc. Uses data from memory and from Accumulator to perform arithmetic. Always stores result of operation in Accumulator.
2. genaral purpose registers:
8-bit B and 8-bit C registers can be used as one 16-bit BC register pair. When used as a pair the C register contains low-order byte. Some instructions may use BC register as a data pointer.
8-bit D and 8-bit E registers can be used as one 16-bit DE register pair. When used as a pair the E register contains low-order byte. Some instructions may use DE register as a data pointer.
8-bit H and 8-bit L registers can be used as one 16-bit HL register pair. When used as a pair the L register contains low-order byte. HL register usually contains a data pointer used to reference memory addresses.
3. special purpose registers:
a) Accumulator or A register is an 8-bit register used for arithmetic, logic, I/O and load/store operations.
b) Flag is an 8-bit register containing 5 1-bit flags:
- Sign - set if the most significant bit of the result is set.
- Zero - set if the result is zero.
- Auxiliary carry - set if there was a carry out from bit 3 to bit 4 of the result.
- Parity - set if the parity (the number of set bits in the result) is even.
- Carry - set if there was a carry during addition, or borrow during subtraction/comparison.
c)Stack pointer is a 16 bit register. This register is always incremented/decremented by 2
d)Program counter is a 16-bit register.
4. instruction register and decoder:
Temporary store for the current instruction ofa program. Latest instruction sent here from memory prior to execution. Decoder then takes instruction and ‘decodes’ or interprets the instruction. Decoded instruction then passed to next stage.
5. Timing and control unit: Generates signals within uP to carry out the instruction, which has been decoded. In reality causes certain connections between blocks of the uP to be opened or closed, so that data goes where it is required, and so that ALU operations occur.